1. Field of the Invention
The invention relates to a chip, and more particularly to a chip for outputting a high speed signal.
2. Description of the Related Art
Integrated circuit (IC) technology plays an important role in the electronics industry. To reduce debug or test time, an external analyzer is used to observe an IC signal. The analyzer hardly observes a high-speed analog signal or a high-speed digital signal. For example, an engineer wishes to observe a high frequency 6-bit signal in an 18x DVD system, the speed of the signal transmitted to the analyzer is about 2.825 Gbps.
FIG. 1 is a conventional testing system. Conventional testing system 100 comprises a chip 110 and an analyzer 120. Chip 110 comprises a multiplexer 111, a digital to analog converter (DAC) 112, and a pad 113. Multiplexer 111 outputs one of target signals ST1˜STn according to a selection signal SSEL. DAC 112 transforms the output signal of multiplexer 111 from a digital state to an analog state. Pad 113 transmits the transformed signal to analyzer 120.
Analyzer 120, via DAC 112, can read high-speed target signals ST1˜STn. To match speed of the high-speed target signals ST1˜STn, the processing speed of DAC 112 is also high, thus, the cost of testing system 100 is increased. Moreover, another disadvantage is that the original digital signal ST1˜STn will be distorted by the DAC 112.
FIG. 2 is another conventional testing system. Conventional testing system 200 comprises a chip 210 and an analyzer 220. Chip 210 comprises a multiplexer 211, a serial to parallel converter 222, and pads P1˜Pn. Multiplexer 211 outputs one of target signals ST1˜STn according to a selection signal SSEL. The serial to parallel converter 222 is used to corporate with the pads P1˜Pn with limit transmitting bandwidths and the target signals with very high throughput rate. Serial to parallel converter 222 transforms the target signals ST1˜STn from a serial state to a parallel state. Pads P1˜Pn outputs the transformed target signals to analyzer 220.
However, in the high-speed application, a synchronization issue occurs between pads P1˜Pn. Additionally, in order to transmit high-speed signals, a large number of pads are required, and the cost of chip 210 is increased.